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STB5NK50Z/-1 - STD5NK50Z/-1 STP5NK50Z - STP5NK50ZFP
N-CHANNEL 500V - 1.22 - 4.4A TO-220/FP-D/IPAK-D2/I2PAK Zener-Protected SuperMESHTMMOSFET
Table 1: General Features
TYPE STB5NK50Z STB5NK50Z-1 STD5NK50Z STD5NK50Z-1 STP5K50Z STP5K50ZFP
s s s s s s s
Figure 1: Package
ID 4.4 A 4.4 A 4.4 A 4.4 A 4.4 A 4.4 A Pw 70 W 70 W 70 W 70 W 70 W 25 W TO-220
VDSS 500 500 500 500 500 500 V V V V V V
RDS(on) < 1.5 < 1.5 < 1.5 < 1.5 < 1.5 < 1.5
3 12
3 1 2
TYPICAL RDS(on) = 1.22 EXTREMELY HIGH dv/dt CAPABILITY IMPROVED ESD CAPABILITY 100% AVALANCHE RATED GATE CHARGE MINIMIZED VERY LOW INTRINSIC CAPACITANCES VERY GOOD MANUFACTURING REPEATIBILITY
I2PAK
TO-220FP
3 1
3 1
1
3 2
DPAK
D2PAK
IPAK
Figure 2: Internal Schematic Diagram DESCRIPTION The SuperMESHTM series is obtained through an extreme optimization of ST's well established stripbased PowerMESHTM layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmeshTM products.
APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s IDEAL FOR OFF-LINE POWER SUPPLIES, ADAPTORS AND PFC s LIGHTING Table 2: Order Codes
SALES TYPE STB5NK50ZT4 STB5NK50Z-1 STD5NK50ZT4 STD5NK50Z-1 STP5NK50Z STP5NK50ZFP MARKING B5NK50Z B5NK50Z D5NK50Z D5NK50Z P5NK50Z P5NK50ZFP PACKAGE D2PAK I2PAK DPAK IPAK TO-220 TO-220FP PACKAGING TAPE & REEL TUBE TAPE & REEL TUBE TUBE TUBE Rev. 2 September 2005 1/17
STB5NK50Z/-1 - STD5NK50Z/-1 - STP5NK50Z - STP5NK50ZFP
Table 3: Absolute Maximum ratings
Symbol Parameter
STP5NK50Z STB5NK50Z/-1
Value
STP5NK50ZFP STD5NK50Z STD5NK50Z-1
Unit
VDS VDGR VGS ID ID IDM ( ) PTOT VESD(G-S) dv/dt (1) VISO Tj Tstg
Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Gate source ESD(HBM-C=100pF, R=1.5K) Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Operating Junction Temperature Storage Temperature 4.4 2.7 17.6 70 0.56
500 500 30 4.4 (*) 2.7 (*) 17.6 (*) 25 0.2 3000 4.5 2500 -55 to 150 -55 to 150 4.4 2.7 17.6 70 0.56
V V V A A A W W/C V V/ns V C C
( ) Pulse width limited by safe operating area (1) ISD 4.4A, di/dt 200A/s, VDD V(BR)DSS, Tj TJMAX. (*) Limited only by maximum temperature allowed
Table 4: Thermal Data
TO-220 I2PAK/D2PAK Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 1.78 TO-220FP 5 62.5 300 DPAK 1.78 C/W C/W C
Table 5: Avalanche Characteristics
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 50 V) Max Value 4.4 130 Unit A mJ
Table 6: Gate-Source Zener Diode
Symbol BVGSO Parameter Gate-Source Breakdown Voltage Test Conditions Igs= 1mA (Open Drain) Min. 30 Typ. Max. Unit V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components.
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ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED) Table 7: On /Off
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 1 mA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125C VGS = 20 V VDS = VGS, ID = 50 A VGS = 10 V, ID = 2.2 A 3 3.75 1.22 Min. 500 1 50 10 4.5 1.5 Typ. Max. Unit V A A A V
Table 8: Dynamic
Symbol gfs (1) Ciss Coss Crss COSS eq (3). td(on) tr td(off) tf Qg Qgs Qgd Parameter Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Turn-on Delay Time Rise Time Turn-off-Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = 25 V, f = 1 MHz, VGS = 0 Min. Typ. 3.1 535 75 17 45 15 10 32 15 20 4 10 28 Max. Unit S pF pF pF pF ns ns ns ns nC nC nC Forward Transconductance VDS = 15 V , ID = 2.2 A
VGS = 0 V, VDS = 0 to 400 V VDD = 250 V, ID = 2.2 A, RG = 4.7 , VGS = 10 V (see Figure 19) VDD = 400 V, ID = 4.4 A, VGS = 10 V (see Figure 22)
Table 9: Source Drain Diode
Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 4.4 A, VGS = 0 ISD = 4.4 A, di/dt = 100 A/s VDD = 30V, Tj = 150C (see Figure 20) 310 1425 9.2 Test Conditions Min. Typ. Max. 4.4 17.6 1.6 Unit A A V ns nC A
(1) Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. (2) Pulse width limited by safe operating area. (3) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.
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Figure 3: Safe Operating Area For DPAK/IPAK/ D2PAK/I2PAK/TO-220 Figure 6: Safe Operating Area For TO-220FP
Figure 4: Thermal Impedance For DPAK/IPAK/ D2PAK/I2PAK/TO-220
Figure 7: Thermal Impedance For TO-220FP
Figure 5: Output Characteristics
Figure 8: Transfer Characteristics
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Figure 9: Transconductance Figure 12: Static Drain-Source On Resistance
Figure 10: Gate Charge vs Gate-source Voltage
Figure 13: Capacitance Variations
Figure 11: Normalized Gate Threshold Voltage vs Temperature
Figure 14: Normalized On Resistance vs Temperature
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Figure 15: Source-Drain Forward Characteristics Figure 17: Normalized BVDSS vs Temperature
Figure 16: Maximum Avalanche Energy vs Temperature
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Figure 18: Unclamped Inductive Load Test Circuit Figure 21: Unclamped Inductive Wafeform
Figure 19: Switching Times Test Circuit For Resistive Load
Figure 22: Gate Charge Test Circuit
Figure 20: Test Circuit For Inductive Load Switching and Diode Recovery Times
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In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
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TO-220FP MECHANICAL DATA
mm. MIN. 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 28.6 9.8 2.9 15.9 9 3 30.6 10.6 3.6 16.4 9.3 3.2 1.126 .0385 0.114 0.626 0.354 0.118 TYP MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.141 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409
DIM. A B D E F F1 F2 G G1 H L2 L3 L4 L5 L6 L7 O
A
B
L3 L6 L7
F1 F
D
G1 H
F2
L2 L5
E
123
L4
G
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TO-220 MECHANICAL DATA
DIM. A b b1 c D E e e1 F H1 J1 L L1 L20 L30 mm. MIN. 4.40 0.61 1.15 0.49 15.25 10 2.40 4.95 1.23 6.20 2.40 13 3.50 16.40 28.90 3.75 2.65 3.85 2.95 0.147 0.104 TYP MAX. 4.60 0.88 1.70 0.70 15.75 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 MIN. 0.173 0.024 0.045 0.019 0.60 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 0.645 1.137 0.151 0.116 inch TYP. MAX. 0.181 0.034 0.066 0.027 0.620 0.409 0.106 0.202 0.052 0.256 0.107 0.551 0.154
oP
Q
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TO-251 (IPAK) MECHANICAL DATA
DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033
H C A C2 L2 D B3 B6 A1 L
= =
3
B5
B
A3
=
B2
=
G
=
E
L1
1
2
=
0068771-E
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TO-262 (I2PAK) MECHANICAL DATA
mm. DIM. MIN. A A1 b b1 c c2 D e e1 E L L1 L2 4.40 2.40 0.61 1.14 0.49 1.23 8.95 2.40 4.95 10 13 3.50 1.27 TYP MAX. 4.60 2.72 0.88 1.70 0.70 1.32 9.35 2.70 5.15 10.40 14 3.93 1.40 MIN. 0.173 0.094 0.024 0.044 0.019 0.048 0.352 0.094 0.194 0.393 0.511 0.137 0.050 TYP. MAX. 0.181 0.107 0.034 0.066 0.027 0.052 0.368 0.106 0.202 0.410 0.551 0.154 0.055 inch
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DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
DIM. A B C D G N T 1.5 12.8 20.2 16.4 50 22.4 18.4 13.2 mm MIN. MAX. 330 0.059 0.504 0.520 0.795 0.645 0.724 1.968 0.881 BULK QTY 2500 inch MIN. MAX. 12.992
TAPE MECHANICAL DATA
DIM. A0 B0 B1 D D1 E F K0 P0 P1 P2 R
W
BASE QTY 2500
mm MIN. 6.8 10.4 1.5 1.5 1.65 7.4 2.55 3.9 7.9 1.9 40
15.7 16.3
inch MIN. MAX. 7 0.267 0.275 0.409 0.417 0.476 0.059 0.063 0.059 0.065 0.073 0.291 0.299 0.100 0.108 0.153 0.161 0.311 0.319 0.075 0.082 1.574
0.618 0.641
MAX. 10.6 12.1 1.6 1.85 7.6 2.75 4.1 8.1 2.1
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D2PAK MECHANICAL DATA TO-247 MECHANICAL DATA
mm. DIM. MIN. A A1 A2 B B2 C C2 D D1 E E1 G L L2 L3 M R V2 0 4.88 15 1.27 1.4 2.4 0.4 4 10 8.5 5.28 15.85 1.4 1.75 3.2 0.192 0.590 0.050 0.055 0.094 0.015 4.4 2.49 0.03 0.7 1.14 0.45 1.23 8.95 8 10.4 0.393 0.334 0.208 0.625 0.055 0.068 0.126 TYP MAX. 4.6 2.69 0.23 0.93 1.7 0.6 1.36 9.35 MIN. 0.173 0.098 0.001 0.027 0.044 0.017 0.048 0.352 0.315 TYP. MAX. 0.181 0.106 0.009 0.036 0.067 0.023 0.053 0.368 inch
3
1
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TO-252 (DPAK) MECHANICAL DATA
mm MIN. A A1 A2 B B2 C C2 D E G H L2 L4 V2 0.60 0o 2.20 0.90 0.03 0.64 5.20 0.45 0.48 6.00 6.40 4.40 9.35 0.8 1.00 8o 0.024 0o TYP. MAX. 2.40 1.10 0.23 0.90 5.40 0.60 0.60 6.20 6.60 4.60 10.10 MIN. 0.087 0.035 0.001 0.025 0.204 0.018 0.019 0.236 0.252 0.173 0.368 0.031 0.039 0o inch TYP. MAX. 0.094 0.043 0.009 0.035 0.213 0.024 0.024 0.244 0.260 0.181 0.398
DIM.
P032P_B
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Table 10: Revision History
Date 16-Jun-2004 06-Sep-2005 Revision 1 2
2
Description of Changes D PAK Included. New Stylesheet. Inserted Ecopack indication
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2005 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
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